Doctorates' Information System

     N Prasad

Ph.D. fromIndian Institute of Technology Kharagpur - Electronics and Electrical Communication Engineering
Supervisor(s)  Prof. Santanu Chattopadhyay and Prof. Indrajit Chakrabarti
Ph.D. status  Joined in 2013 :: In progress
AddressEmbedded Systems Lab, EECE, IIT Kharagpur
Formal Education
Exam / Degree Board / UnivBranchYear
M.Tech.NIT RourkelaVLSI Design and Embedded Systems2013
B.Tech.JNTU HyderabadElectronics and Communication Engineering2011
12Board of Intermediate Education, Andhra PradeshMathematics, Physics, and Chemistry2007
10Board of Secondary Education, Andhra Pradesh-2005

Research Areas
  • Reconfigurable Architecture Design
  • Approximate Computing
  • Hardware Security
  • Stochastic Computing

  • VHDL, Verilog
  • Xilinx ISE, Altera Quartus
  • Mentor Graphics ModelSim
  • Synopsys Design Vision, Cadence SoC Encounter
  • Keil uVision
  • C, Embedded C (Beginner)
  • Cadence Virtuoso, Tanner EDA Tools
  • Text Formatting - LaTeX

  • IEEE CASS Outreach Student Travel Grant to Present at iNIS 2015, Indore, India

Teaching Experience
  • VLSI CAD Laboratory(P) at IIT Kharagpur Spring 2017 (1 terms)
  • VLSI CAD(T) at IIT Kharagpur Spring 2015, 2016, 2017 (3 terms)
  • Embedded Systems Laboratory(P) at IIT Kharagpur Autumn 2016 (1 terms)
  • Digital Electronic Circuits(T) at IIT Kharagpur Autumn 2014, 2015, 2016 (3 terms)
  • Analog Circuits Laboratory(P) at IIT Kharagpur Spring 2015, 2016 (2 terms)
  • Microcontroller Systems Laboratory (EC49001)(P) at IIT Kharagpur Autumn 2014,2015 (2 terms)

Fellowships / Scholarships
  • VLSID Fellowship to Attend 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems, 7-11 Jan. 2017, Hyderabad, India
  • VSI Student Fellowship to attend 24th IEEE Asian Test Symposium, 22-26 Nov. 2015, Mumbai, India
  • MHRD Fellowship for PhD

Papers Published in Journals
  • An Energy-Efficient Network-on-Chip Based Reconfigurable Viterbi Decoder Architecture by N Prasad, Santanu Chattopadhyay, and Indrajit Chakrabarti IEEE Transactions on Circuits and Systems I Regular Papers Accepted (2018)
  • Design and Evaluation of ZMesh Topology for On-Chip Interconnection Networks by N Prasad, Priyajit Mukherjee, Santanu Chattopadhyay, and Indrajit Chakrabarti Journal of Parallel and Distributed Computing Accepted (2017)
  • A Parallel Stochastic Number Generator with Bit Permutation Networks by Vikash Sehwag, N Prasad, and Indrajit Chakrabarti IEEE Transactions on Circuits and Systems II Express Briefs Accepted (2017)
  • Reconfigurable Data Parallel Constant Geometry Fast Fourier Transform Architectures on Network-on-Chip by N Prasad, Santanu Chattopadhyay, Indrajit Chakrabarti Microprocessors and Microsystems 39(8), 741-751, Nov. (2015)

Papers Presented at Conferences
  • Runtime Mitigation of Illegal Packet Request Attacks in Networks-on-Chip by N Prasad, Rajit Karmakar, Santanu Chattopadhyay, and Indrajit Chakrabarti 2017 IEEE International Symposium on Circuits and Systems Accepted (2017)
  • A New Logic Encryption Strategy Ensuring Key Interdependency by Rajit Karmakar, N Prasad, Santanu Chattopadhyay, Rohit Kapur, and Indranil Sengupta 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems 429-434 (2017)
  • Approximate Conditional Carry Adder for Error Tolerant Applications by Avishek Sinha Roy, N Prasad, and Anindya Sundar Dhar 2016 20th International Symposium on VLSI Design and Test (VDAT) 24-27 May (2016)
  • ZMesh An Energy-Efficient Network-on-Chip Topology for Constant-Geometry Algorithms by N Prasad, Santanu Chattopadhyay, and Indrajit Chakrabarti 2015 IEEE International Symposium on Nanoelectronic and Information Systems 146-151 (2015)
  • NoC Based Multiplier-Less Constant Geometry FFT Architecture by N Prasad, Indrajit Chakrabarti, and Santanu Chattopadhyay 2014 Fourth International Conference of Emerging Applications of Information Technology 173-178 (2014)
  • A Spare Link Based Reliable Network-on-Chip Design by Navonil Chatterjee, N Prasad, and Santanu Chattopadhyay 18th International Symposium on VLSI Design and Test 1-6 (2014)

Indian Institute of Technology, Kharagpur-721 302, INDIA
Telephone Number +91-3222-255221 | FAX : +91-3222-255303