Doctorates' Information System

     Kunal Banerjee

Ph.D. fromIndian Institute of Technology, Kharagpur - Computer Science and Engineering
Supervisor(s)  Prof. Chittaranjan Mandal, Prof. Dipankar Sarkar
Ph.D. status  Joined in 2010 :: In progress
AddressRoom No. S-204, B C Roy Hall of Residence, IIT Kharagpur
Phone03222281431
Emailkunalb@cse.iitkgp.ernet.in
Formal Education
Exam / Degree Board / UnivBranchYear
B.Tech.West Bengal University of TechnologyComputer Science and Engineering2008
12West Bengal Council of Higher Secondary EducationScience2004
10Council for the Indian School Certificate ExaminationsI.C.S.E.2002

Research Areas
  • Formal Verification
  • Formal Methods
  • Program Analysis

Skills
  • Programming - C,Cpp,Java,PL/SQL,Scheme,Prolog,Lisp,Visual Basic, some scripting and markup languages
  • Tools - ACL2, CUDD, CVC, ISL, Yices, Z3

Awards
  • Best Paper Award in the conference I-CARE 2013

Experience
  • Assistant Software Engineer, Tata Consultancy Services, Nov 2008 - Jun 2009

Teaching Experience
  • Logic Synthesis(L) at AVLSI Lab Summer Course 2010, IIT Kharagpur Summer 2010 (1 terms)
  • Programming and Data Structure (Theory)(T) at Department of Computer Science and Engineering, IIT Kharagpur Autumn 2014, Spring 2014, Spring 2013 (3 terms)
  • Discrete Structures(T) at Department of Computer Science and Engineering, IIT Kharagpur Autumn 2013, Autumn 2010 (2 terms)
  • Theory of Computation(T) at Department of Computer Science and Engineering, IIT Kharagpur Autumn 2012 (1 terms)
  • Computer Architecture and Operating Systems(T) at Department of Computer Science and Engineering, IIT Kharagpur Spring 2012 (1 terms)
  • Formal Systems(T) at Department of Computer Science and Engineering, IIT Kharagpur Spring 2011 (1 terms)
  • Programming and Data Structure Lab(P) at Department of Computer Science and Engineering, IIT Kharagpur Spring 2010 (1 terms)
  • Computer Organization and Architecture Lab(P) at Department of Computer Science and Engineering, IIT Kharagpur Autumn 2009 (1 terms)

Fellowships / Scholarships
  • TCS Research Fellowship, Nov 2012 - present, Tata Consultancy Services Ltd
  • Senior Research Fellowship, Jul 2009 - Oct 2012, Dapartment of Science and Technology, Govt of India

Papers Published in Journals
  • Extending the FSMD Framework for Validating Code Motions of Array-Handling Programs by Kunal Banerjee, Dipankar Sarkar, Chittaranjan Mandal IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 33, 2015-2019 (2014)
  • Verification of Code Motion Techniques using Value Propagation by Kunal Banerjee, Chandan Karfa, Dipankar Sarkar, Chittaranjan Mandal IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 33, 1180-1193 (2014)
  • Verification of Loop and Arithmetic Transformations of Array-Intensive Behaviours by Chandan Karfa, Kunal Banerjee, Dipankar Sarkar, Chittaranjan Mandal IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 32, 1787-1800 (2013)

Papers Presented at Conferences
  • An Equivalence Checking Mechanism for Handling Recurrences in Array-Intensive Programs by Kunal Banerjee ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL) Student Research Competition 1-2 (2015)
  • Deriving Bisimulation Relations from Path Extension Based Equivalence Checkers by Kunal Banerjee, Chittaranjan Mandal, Dipankar Sarkar IMPECS-POPL Workshop on Emerging Research and Development Trends in Programming Languages (WEPL) 1-2 (2015)
  • Automated Checking of the Violation of Precedence of Conditions in else-if Constructs in Students Programs by K K Sharma, Kunal Banerjee, Indra Vikas, Chittaranjan Mandal International Conference on MOOC, Innovation and Technology in Education (MITE) 201-204 (2014)
  • A Scheme for Automated Evaluation of Programming Assignments using FSMD based Equivalence Checking by K K Sharma, Kunal Banerjee, Chittaranjan Mandal IBM Collaborative Academia Research Exchange (I-CARE) 101-104 (2014)
  • Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks by Partha De, Kunal Banerjee, Chittaranjan Mandal, Debdeep Mukhopadhyay Euromicro Conference on Digital System Design (DSD) 520-527 (2014)
  • Extending the Scope of Translation Validation by Augmenting Path Based Equivalence Checkers with SMT Solvers by Kunal Banerjee, Chittaranjan Mandal, Dipankar Sarkar International Symposium on VLSI Design and Test (VDAT) 1-6 (2014)
  • A BDD based Secure Hardware Design Method to Guard Against Power Analysis Attacks by Partha De, Kunal Banerjee, Chittaranjan Mandal International Symposium on VLSI Design and Test (VDAT) 1-2 (2014)
  • Experimentation with SMT Solvers and Theorem Provers for Verification of Loop and Arithmetic Transformations by Chandan Karfa, Kunal Banerjee, Dipankar Sarkar, Chittaranjan Mandal IBM Collaborative Academia Research Exchange (I-CARE) 31 - 34 (2013)
  • Designing DPA Resistant Circuits Using BDD Architecture and Bottom Pre-charge Logic by Partha De, Kunal Banerjee, Chittaranjan Mandal, Debdeep Mukhopadhyay Euromicro Conference on Digital System Design (DSD) 641-644 (2013)
  • A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques by Kunal Banerjee, Chandan Karfa, Dipankar Sarkar, Chittaranjan Mandal International Symposium on Electronic System Design (ISED) pages 67-71 (2012)
  • Translation Validation for PRES Models of Parallel Behaviours via an FSMD Equivalence Checker by Soumyadip Bandyopadhyay, Kunal Banerjee, Dipankar Sarkar, Chittaranjan Mandal International Symposium on VLSI Design and Test (VDAT) pages 69-78 (2012)
  • Equivalence Checking of Array-Intensive Programs by Chandan Karfa, Kunal Banerjee, Dipankar Sarkar, Chittaranjan Mandal IEEE Computer Society Annual Symposium on VLSI (ISVLSI) pages 156-161 (2011)
  • A Fair Multiple-Slot Assignment Protocol for TDMA Scheduling in Wireless Sensor Networks by Kunal Banerjee, Priyanko Basuchaudhuri, Debesh Sadhukhan and Nabanita Das Workshop on Mobile Systems (WoMS) pages 65-71 (2008)

Indian Institute of Technology, Kharagpur-721 302, INDIA
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